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PIC16F946
DS41265A-page 154
Preliminary
2005 Microchip Technology Inc.
12.1.7
CONFIGURING THE A/D
After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion is started. The analog input channels must
have their corresponding TRIS bits selected as inputs.
To determine sample time, see Section 19.0 “Electrical
Specifications”. After this sample time has elapsed, the
A/D conversion can be started.
These steps should be followed for an A/D conversion:
1.
Configure the A/D module:
Configure analog/digital I/O (ANSEL)
Configure voltage reference (ADCON0)
Select A/D input channel (ADCON0)
Select A/D conversion clock (ADCON1)
Turn on A/D module (ADCON0)
2.
Configure A/D interrupt (if desired):
Clear ADIF bit (PIR1<6>)
Set ADIE bit (PIE1<6>)
Set PEIE and GIE bits (INTCON<7:6>)
3.
Wait the required acquisition time.
4.
Start conversion:
Set GO/DONE bit (ADCON0<1>)
5.
Wait for A/D conversion to complete, by either:
Polling for the GO/DONE bit to be cleared
(with interrupts disabled); OR
Waiting for the A/D interrupt
6.
Read A/D Result register pair
(ADRESH:ADRESL); clear bit ADIF if required.
7.
For next conversion, go to step 1 or step 2 as
required. The A/D conversion time per bit is
defined as TAD. A minimum wait of 2 TAD is
required before the next acquisition starts.
EXAMPLE 12-1:
A/D CONVERSION
;This code block configures the A/D
;for polling, Vdd reference, R/C clock
;and RA0 input.
;
;Conversion start and wait for complete
;polling code included.
;
BSF
STATUS,RP0
;Bank 1
MOVLW
B’01110000’
;A/D RC clock
MOVWF
ADCON1
BSF
TRISA,0
;Set RA0 to input
BSF
ANSEL,0
;Set RA0 to analog
BCF
STATUS,RP0
;Bank 0
MOVLW
B’10000001’
;Right, Vdd Vref, AN0
MOVWF
ADCON0
CALL
SampleTime
;Wait min sample time
BSF
ADCON0,GO
;Start conversion
BTFSC
ADCON0,GO
;Is conversion done?
GOTO
$-1
;No, test again
MOVF
ADRESH,W
;Read upper 2 bits
MOVWF
RESULTHI
BSF
STATUS,RP0
;Bank 1
MOVF
ADRESL,W
;Read lower 8 bits
MOVWF
RESULTLO
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